寄存器名称 | DPORT 地址 | AHB(安全)地址 |
---|---|---|
UART_FIFO_REG | 0x3FF40000 | 0x60000000 |
UART1_FIFO_REG | 0x3FF50000 | 0x60010000 |
UART2_FIFO_REG | 0x3FF6E000 | 0x6002E000 |
I2S0_FIFO_RD_REG | 0x3FF4F004 | 0x6000F004 |
I2S1_FIFO_RD_REG | 0x3FF6D004 | 0x6002D004 |
GPIO_OUT_REG | 0x3FF44004 | 0x60004004 |
GPIO_OUT_W1TC_REG | 0x3FF4400c | 0x6000400c |
GPIO_OUT1_REG | 0x3FF44010 | 0x60004010 |
GPIO_OUT1_W1TS_REG | 0x3FF44014 | 0x60004014 |
GPIO_OUT1_W1TC_REG | 0x3FF44018 | 0x60004018 |
GPIO_ENABLE_REG | 0x3FF44020 | 0x60004020 |
GPIO_ENABLE_W1TS_REG | 0x3FF44024 | 0x60004024 |
GPIO_ENABLE_W1TC_REG | 0x3FF44028 | 0x60004028 |
GPIO_ENABLE1_REG | 0x3FF4402c | 0x6000402c |
GPIO_ENABLE1_W1TS_REG | 0x3FF44030 | 0x60004030 |
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CPU架构之争——X86-ARM
2020-11-03